Let's consider the 2R2T configuration, each frame consists of 4 samples in each direction. As an example the PZSDR projects uses SWAP on some boards based on the board layout. ![]() There is a limitation though, the IP core does NOT support swapping of the data ports in CMOS mode. This is applicable to both DDR and SDR modes. The samples are then delineated in-order using the FRAME signal. ![]() The interface is in fact quite simple, in LVDS mode samples require two active clock edges and in CMOS mode a single edge. It avoids all the programmable flavors of the device interface mess. The IP supports both LVDS and CMOS interfaces (configurable, see parameters section).
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